Fang Lv (吕方)
Senior Engineer
Institute of Computing Technology (ICT)
State Key Lab of Processors (SKLP)
Email: flv@ict.ac.cn
About Me
I'm a senior engineer at the Institute of Computing Technology, Chinese Academy of Sciences. I received my
Ph.D. degree in computer architecture from the State Key Laboratory of Computer Architecture, Institute of
Computing Technology, Chinese Academy of Sciences, Beijing, in 2014. My main research interests include
architecture-oriented performance analysis and optimization, compiler optimizations, etc. I am a member of
CCF.
Projects
- Agile Mid-End Optimization Techniques for Strategic Pilot Science and Technology Project of
Chinese Academy of Sciences (Category A)
2022.11 - Present
- Agile Compiler Techniques for Strategic Pilot Science and Technology Project of Chinese Academy
of Sciences (Category C)
2020.01 - 2021.12
- The Compilation System for Heterogeneous Memory in the 863 Project “Parallel Model and
Programming Framework for Heterogeneous Memory-Oriented Computing Systems”.
2015.01 - 2017.01
- Huawei A Class Project of High Throughput Server Project - Compiler for ARM32, ARM64 Chips.
2013.01 - 2014.01
- High Performance Compiler for Loongson Processors for Core Electronic Devices, High-end Generic
Chips and Basic Software.
2011.01 - 2014.01
- High Performance Compiler for Loongson 3A Processor.
2008.01 - 2011.01
- SIMD Optimized Compiler for Sunway Processors.
2006.12 - 2007.12
- High Performance Compiler for Loongson 2E Chip Processors.
2003.07 - 2006.07
- ORC Open Source Compiler for Intel Itanium Chip Processors.
2001.09 - 2003.07
Publications
-
Unified Holistic Memory Management Supporting Multiple Big Data Processing Frameworks over
Hybrid Memories.
By Chen Lei, Jiacheng Zhao, Chenxi Wang, Ting Cao, John Zigman, Haris Volos, Onur Mutlu, Fang
Lv, Xiaobing Feng, Guoqing Harry Xu, Huimin Cui.
ACM Transactions on Computer Systems (TOCS), 2022
-
Automatic Target Description File Generation.
By Hongna Geng, Fang Lv, Ming Zhong, Huimin Cui, Jingling Xue, Xiaobing Feng.
Journal of Computer Science and Technology. Mar. 2022. DOI 10.1007/s11390-022-1919-x
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Referee: A Pattern-Guided Approach for Auto Design in Compiler-Based Analyzers.
By Fang Lv, Hao Li, Lei Wang, Ying Liu, Huimin Cui, Jingling Xue, Xiaobing Feng.
2020 IEEE 27th International Conference on Software Analysis, Evolution and Reengineering (SANER).
IEEE, 2020:1-12
-
PPOpenCL: A Performance-Portable OpenCL Compiler with Host and Kernel Thread Code Fusion.
By Ying Liu, Lei Huang, Mingchuan Wu, Huimin Cui, Fang Lv, Xiaobing Feng, Jingling Xue.
In Proceedings of the 28th International Conference on Compiler Construction (CC '19). CC 2019:
2-16
-
Panthera: Holistic Memory Management for Big Data Processing over Hybrid Memories.
By Chenxi Wang, Huimin Cui, Ting Cao, John Zigman, Haris Volos, Onur Mutlu, Fang Lv, Xiaobing
Feng,
Guoqing Harry Xu.
In Proceedings of the 40th ACM SIGPLAN Conference on Programming Language Design and Implementation
(PLDI 2019).
June 2019 Pages 347-362
-
NVM Streaker: a Fast and Reconfigurable Performance Simulator for Non-Volatile Memory Based
Memory Architecture.
By Danqi Hu, Fang Lv, Chenxi Wang, Huimin Cui, Lei Wang, Ying Liu, Xiaobing Feng.
The Journal of Supercomputing. Volume 74, Issue 8, August 2018. pp:3875-3903
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Heterogeneous Memory Programming Framework Based on Spark for Big Data Processing.
By Chenxi Wang, Fang Lv, Huimin Cui, Ting Cao, John Zigman, Liangji Zhuang, Xiaobing Feng.
Journal of Computer Research and Development, 2018, 55 (2):246-264
-
Efficient Management for Hybrid Memory in Managed Language Runtime.
By Chenxi Wang, Ting Cao, John Zigman, Fang Lv, Yunquan Zhang, Xiaobing Feng.
IFIP International Conference on Network and Parallel Computing (NPC), 2016, (Acceptance rate 17%)
-
Articulation Points Guided Redundancy Elimination for Betweenness Centrality.
By Lei Wang, Fan Yang, Liangji Zhuang, Huimin Cui, Fang Lv, Xiaobing Feng.
In Proceedings of the 21st ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming
(PPoPP '16).
February 2016. Article No.: 7. Pages 1-13
-
WiseThrottling: A New Asynchronous Task Scheduler for Mitigating I/O Bottleneck in Large-Scale
Datacenter Servers.
By Fang Lv, Lei Liu, Huimin Cui, Lei Wang, Ying Liu, Xiaobing Feng, Penchung Yew.
The Journal of Supercomputing. Volume 71, Issue 8. August 2015. pp:3054-3093
-
Dynamic I/O-Aware Scheduling for Batch-Mode Applications on Chip Multiprocessor Systems of
Cluster Platforms.
By Fang Lv, Huimin Cui, Lei Wang, Lei Liu, Chenggang Wu, Xiaobing Feng, Penchung Yew.
Journal of Computer Science and Technology. Volume 29, Pages 21-37 (2014)
-
Survey of Scheduling Policies for Co-Run Degradation.
By Fang Lv, Huimin Cui, Wei Huo, Xiaobing Feng.
Journal of Computer Research and Development. 2014, 51(1):17-30.
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Research on Heterogeneous Parallel Programming Model.
By Ying Liu, Fang Lv, Lei Wang, Li Chen, Huimin Cui, Xiaobing Feng.
Journal of Software,2014, 25(7)
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Exploiting Idle Register Classes for Fast Spill Destination.
By Fang Lv, Lei Wang, Xiaobing Feng, Zhiyuan Li, Zhaoqing Zhang.
In Proceedings of the 22nd Annual International Conference on Supercomputing (ICS '08).
June 2008, Pages 319-326
-
A Register Pressure Sensitive Instruction Speculative Scheduling Technology.
By Lei Huang, Xiaobing Feng, Fang Lv.
Journal of Computer Research and Development, 2009, 46(3):485-491
-
An Address Register Promotion Method Based on Feedbacks.
By Chao Zhang, Fang Lv, Lei Wang, Xiaobing Feng.
Journal of Computer Research and Development, 2009, 46(4):698-704
Honors and Awards
2007 and 2008 Outstanding Employees of the Institute of Computing Technology, Chinese Academy of Sciences.